1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device and more particularly to a method for manufacturing a semiconductor device for forming, by using a CVD (Chemical Vapor Deposition) method, wiring composed of copper only or materials in which copper forms the principal constituent of the wiring on a connecting trench or connecting hole of an insulating film covering a semiconductor substrate.
2. Description of the Related Art
An LSI (Large Scale Integrated) circuit such as a microprocessor or memory known as a typical semiconductor device is currently scaled down as an integration degree thereof increases and, as a result, a semiconductor area constituting each device is shrinking. Moreover, when wiring is formed in each semiconductor area, a diameter of a connecting hole such as a contact hole or via hole or of a connecting trench in which wiring is buried, each being formed on an insulating film, is also made smaller. To meet the need for increasing wiring density, a multi-level interconnect technology, by which wiring is stacked in a multi-layer state in the direction of thickness of a semiconductor substrate, has been developed.
In such LSIs, high-speed microprocessors in particular, since an operational problem stems mainly from high electrical resistance of wiring, it is desirous to reduce its electrical resistance. Conventional materials, for wiring employed in semiconductor devices including LSIs are aluminum (Al) or aluminum metals, in which aluminum forms the principal constituent thereof, which are excellent in their electrical characteristics, processability, etc.
However, such aluminum metals have a weakness of low resistance to electro-migration and/or to stress migration. For this reason, instead of aluminum metals, copper or copper metals, in which copper forms the principal constituent thereof, are widely used which have less electrical resistance compared with aluminum or aluminum metals and which are excellent in resistance to electro-migration and/or stress migration.
A thin film composed of such copper or copper metals is formed on a semiconductor substrate by using a CVD method, a sputtering method or a PVD (Physical Vapor Deposition) method in general. In many cases, the CVD method is used because it is excellent in step coverage.
When a copper metal thin film is formed by using the CVD method, it is known that, if the thickness of the copper thin film to be used as wiring is comparatively large, a void (bubble and/or porosity) may occur in the thin film. The void in the wiring causes high electrical resistance and/or breakage thereof, reducing reliability of semiconductor devices.
Accordingly, a method for forming copper wiring being free from the occurrence of such voids has been expected. Such a method for manufacturing semiconductor devices to avoid the effect of voids in copper wiring formed by using a CVD method is disclosed in Japanese Laid-open Patent Application No. Hei10-79389. The disclosed method for manufacturing semiconductor devices is described below in order of processes by referring to FIGS. 7A to 7D.
As shown in FIG. 7A, after concave portions 63A and 63B are formed on an insulating film 62 composed of a silicon oxide film, with a film thickness of about 0.1 xcexcm, covering a silicon substrate 61, a first copper thin film 65 with a film thickness of about 150 nm is formed by using a CVD method on the silicon substrate containing the concave portions 63A and 63B, with a diffusion preventive film 64 put between the insulating film 62 and the copper thin film 65. At this point, voids 66A and 66B are formed on the copper thin film 65.
Then, as depicted in FIG. 7B, by performing an annealing processing on the silicon substrate 61 at a temperature of about 400xc2x0 C. for about 10 minutes, the first copper thin film 65 is made flowing (i.e., being put in reflow process) and poured into the voids 66A and 66B. Subsequently, a second copper thin film 66 is formed on the first copper thin film 65 by using the CVD method as shown in FIG. 7C. Then, the surface of the first and second copper thin films 65 and 66 is polished by a CMP (Chemical Mechanical Polishing) method and copper wiring 67, which is buried in each of the concave portions 63A and 63B, is formed. Thus, the copper wiring 67 being free from voids can be obtained.
However, in the above disclosed method for manufacturing semiconductor devices, there is a problem in that, if a large thickness of the copper thin film is required to impart a wiring function, processes of forming the thin film by using the CVD method and of reflowing have to be repeated several times, thus causing an increase in the number of processes, as a result, leading to inefficient manufacturing.
That is, in the conventional method for manufacturing semiconductor devices, since wiring having a sufficient thickness to impart a wiring function is obtained by combining a process, wherein a copper thin film is formed in such a manner that the film thickness is so small that voids are not produced even by the CVD method, with a process of reflow, the CVD process has to be divided into, for example, three parts and, between the divided processes, the process of reflow has to be put, thus inevitably causing insufficient formation of the copper wiring.
In view of the above, it is an object of the present invention to provide a method for manufacturing a semiconductor device to enable the reduction of the number of processes and efficient formation of wiring in the process of forming copper metals by using a CVD method.
According to a first aspect of the present invention, there is provided a method for manufacturing a semiconductor device for forming wiring on a connecting trench or a connecting hole of an insulating film covering a semiconductor substrate comprising the steps of:
forming, by using a CVD electrical method, a first conductive thin film composed of a desired metal and having a film thickness adjusted so as not to virtually cause bumps and dips attributable to crystal particles on a surface of the thin film on the semiconductor substrate containing the connecting trench or connecting hole;
reflowing by performing heat treatment on the semiconductor substrate and to making flowing the surface of the first conductive thin film;
forming, by methods other than the CVD method, a second conductive thin film composed of a desired metal and having a film thickness that is larger than the depth of the connecting trench or connecting hole on the first conductive thin film; and
planarizing the second conductive thin film.
According to a second aspect of the present invention, there is provided a method for manufacturing a semiconductor device for forming wiring composed of copper only or materials in which copper forms the principal constituent thereof on a connecting trench or connecting hole of an insulating film covering a semiconductor substrate comprising the steps of:
forming, by using a CVD method, a first conductive thin film composed of copper only or materials in which copper forms the principal constituent thereof and having a film thickness adjusted so as not to cause bumps and dips attributable to crystal particles on the surface of the thin film on the semiconductor substrate containing the connecting trench or connecting hole;
reflowing by performing heat treatment on the semiconductor substrate and to making flowing the surface of the first conductive thin film;
forming, by methods other than the CVD method, a second conductive thin film composed of copper only or materials in which copper forms the principal constituent thereof and having a film thickness that is larger than the depth of the connecting trench or connecting hole on the first conductive thin film; and
planarizing the second conductive thin film.
In the foregoing, a preferable mode is one that wherein contains a step of forming, before having the first conductive thin film grown, a barrier metal film on the semiconductor substrate containing the connecting trench or connecting hole.
Also, a preferable mode is one wherein the first conductive thin film is formed in a non-oxidizing atmosphere.
Also, a preferable mode is one wherein reflowing of the first conductive thin film is performed in a reductive atmosphere or in a vacuum atmosphere.
Also, a preferable mode is one wherein the second conductive thin film is formed by a sputtering method or a plating method.
Also, a preferable mode is one wherein planarization of the second conductive thin film is performed by a CMP method.
Also, a preferable mode is one wherein a thickness of the first conductive thin film composed of copper only or materials in which copper forms the principal constituent thereof is 30-150 nm.
Furthermore, a preferable mode is one wherein refractory metals are used as the barrier metals.